The demand for broadband information access increases every year. Spurred on by the desire for ever higher resolution in digital imaging, higher data access speeds, and corporate incentives to increase revenue streams, many inventors have attempted to improve the efficiency of high bandwidth wired information handling systems. Infoimaging has been estimated to be a $385 billion-plus industry that converges image science and information technology. Infoimaging has three inter-related segments: a) devices; b) infrastructure; and c) services and media.
Charged couple devices (CCDs) are known efficient collectors of image data. In order to collect higher resolution image data, at ever higher rates such as that found in today's broadband access networks from CCD imagery, one needs higher register clocking speeds.
Nearly square clocking waveforms are needed to drive the CCDs' transfer registers to shift out image data efficiently. Using standard timing waveform techniques is unacceptable, because the CCDs' transfer register load is extremely large and reactive. Most two-phase register CCDs resemble a distributed load or a transmission line. Therefore, a conventional timing waveform would have difficulty maintaining signal integrity, waveshape, and voltage amplitude, without carefully controlled signal conditioning. The CCDs' registers cannot withstand voltage losses. Their efficiency is greatly dependent on the wave-shape and peak voltage values.
To successfully operate a CCD running at high speeds, the high capacitance of the transfer registers should, preferably, be accommodated.
Although a driving signal is often referred to as a clock and is very similar to a TTL or CMOS digital waveform employed in high bandwidth data handling systems, the driving signal's necessary low characteristic impedance has more demanding requirements. Due to the nature of a transfer register's non-symmetric high capacitive distributed load, high power transfer and low voltage distortion are critical to achieving acceptable charge transfer efficiencies. Employing conventional transmission line techniques from the engineering literature is problematic, as the characteristic impedance for the driving signal becomes much lower than what might be considered the industry standard.
Standard transmission line techniques are conventionally considered for matching the CCD transfer registers' impedance, because of the CCD's input impedance resemblance to an actual transmission line. Three of the most popular transmission line options for high speed wired data transfer systems employ coaxial, twisted pair or fiber optic transmission lines. The vast majority of transmission line usage for Radio Frequency (RF) electrical signals is centered around 50 Ohms for military and industrial systems, or 75 Ohms for commercial cable systems. In engineering literature, many equations for generating transmission line geometry utilize the 50–75 Ohm impedance range as a de-facto standard. However, the equations are often simplified to the point where they do not have a valid solution should the operating impedance deviate from 50 Ohms by more than a factor of ten.
Standard system design techniques tend to assume certain parameters, including: a 50 Ohm system; a matched load; a modest amount of distortion; and that a few decibels (dB) of power loss in the transmission (cable) medium is acceptable. These assumptions are not accurate for two-phase CCD transfer registers. To compensate, designers have typically placed driver circuitry as close to the CCD, as necessary, to avoid any path effects. As speeds increase, short path lengths begin to demonstrate transmission path issues. However, often the driving circuitry and the CCD have different impedance characteristics; and conventional reactive matching techniques do not have the bandwidth to accommodate a large range of operating frequencies.
Another conventional transmission line approach for driving the CCD transfer registers uses a differential signaling technique found in twisted pair technology. Twisted pairs or balanced line systems generally employ differential mode signal propagation. A common format for differential signaling is known as low-voltage-differential-signaling (LVDS). LVDS is a popular method for high-speed data transfer applications. With data transfer as its primary goal, its transmission line structure is centered on a balanced low noise, large bandwidth digital signaling geometry. With LVDS, the source impedance is typically much higher than the line impedance to eliminate common mode ringing. This technique provides digital waveform fidelity with reduced signal amplitude and power transfer. The common design impedance range is between 50 and 150-Ohm differential line and between 50 and 75 Ohm single-ended line. The two-phase CCD register requires waveform fidelity in addition to maintaining signal amplitude into a highly reactive load. Also, increased power transmission efficiency is important to maintaining the integrity of the signal shape at impedance values much lower than 50 Ohms.
Notably, because power transfer is reduced and is not the primary goal of an LVDS implementation, LVDS is not suitable for complementary register clocking. Transmission lines for two-phase CCD clocks have the added necessity of transferring power efficiently without distortion to, what is typically, a non-symmetric, highly capacitive load.
Accordingly, there is a need in the art to provide a transmission structure with the properties of high power transfer, low distortion, and low radiation efficiency to drive high speed complementary circuits, such as two phase CCD transfer registers, while maximizing bandwidth and having a minimum of impedance matching losses.